By Giuseppe Da Prato, Jean-Paul Zolesio

This up to date resource--based at the foreign Federation for info Processing WG 7.2 convention, held lately in Pisa, Italy--provides contemporary effects in addition to totally new fabric on keep watch over idea and form research.

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5 Latency and Bandwidth Getting there is half the fun—old saying, regarding the pleasures of traveling The speed of a communications channel—whether between processor cores and memory in shared-memory platforms, or between network nodes in a cluster of machines—is measured in terms of latency, the end-to-end travel time for a single bit, and bandwidth, the number of bits per second that we can pump onto the channel. To make the notions a little more concrete, consider the San Francisco Bay Bridge, a long, multilane structure for which westbound drivers pay a toll.

1) to deal with network latency, and in GPUs (Chapter 6) to deal with memory latency. ), and many data scientists have access to computer clusters. What are the performance issues on these platforms? The next two sections 26 CHAPTER 2. 1: Symmetric Multiprocsssor System provide an overview. 1 in terms of components and, most importantly, their interconnection. What do we see? • There are processors, depicted by the Ps, in which your program is physically executed. 7 • The processors and memory banks are connected to a bus, a set of parallel wires used for communication between these computer components.

They run independently, except that they share the data of the program in common. If your program is threaded, it will be running on several of the processors at once, each thread on a different core. A key point, as we will see, is that the shared 7 These were called banks in the old days. Later the term modules became more popular, but with the recent popularity of GPUs, the word banks has come back into favor. 5. LATENCY AND BANDWIDTH 27 memory becomes the vehicle for communication between the various processes.

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